First success with a new project: a simple frame buffer and controller for the graphical LCD display I’d previously used with an AVR.
The red board is a Papilio One with a Spartan 3E FPGA, power supply, SPI dataflash for the FPGA configuration, and a FTDI USB-serial IC for communications and programming. The white protoboard houses buffers to drive the 5V LCD from the 3.3V FPGA I/O and a MAX232 used to provide the awkward negative LCD drive voltage. To the left on the green protoboard is a 4-character dot matrix LED display.
A block RAM is just the right size to perform as a frame buffer, and they are dual-ported, so one port can be set aside for outside access. The frame buffer continuously cycles through the contents of that RAM with a simple state machine, occasionally wiggling control signals and delaying for a short period between each line to let the display react. The code will appear on GitHub when it’s cleaned up a bit.
edit: The code for the LCD controller/framebuffer is here.